? semiconductor components industries, llc, 2004 june, 2004 ? rev. 1 1 publication order number: and8127/d and8127/d implementing ncp1207 in qr 24 w ac-dc converter with synchronous rectifier prepared by: petr lidak on semiconductor introduction the ncp1207 is a controller dedicated for driving the current?mode free running quasi?resonant flyback offline converter. this converter is designed for consumer products like notebooks, offline battery chargers, consumer electronics (dvd players, set?top boxes, tvs), etc. the growing interest for emi pollution reduction, efficiency improvement, and maximum safety has been taken into account while designing the ncp1207. by implementing the ncp1207 one can build a power supply that can meet all those requirements. this can be achieved with help of the following ncp1207 main features: ? current?mode control: cycle?by?cycle primary current observation is helping to prevent any significant primary overcurrent which would cause transformer's core saturation and consequent serious power supply failure. ? critical mode quasi?resonant operation: prevents the converter operation in continuous conduction mode in any input and output condition. it is provided by the zero crossing detection of the auxiliary winding's voltage. ? by addition of the reasonable delay the switch turn?on instant can be shifted to the minimum (valley) of drain voltage. this improves emi noise and efficiency. ? dynamic self?supply: ensures ic proper operation in applications where the output voltage varies during operation like battery chargers. the dss also supplies the ic when the overvoltage event is being latched and converter operation is stopped. ? overvoltage protection: by sampling the plateau voltage on the auxiliary winding, the ncp1207 enters into latched fault condition whenever the overvoltage is detected. the controller stays fully latched until the v cc decreases below 4.0 v, e.g. when the user unplugs the power supply from the mains outlet and re?plugs it. the ovp threshold can be adjusted externally. ? over?load protection: by continuously monitoring the feedback loop activity, ncp1207 enters hiccup operation as soon as the power supply is overloaded. as soon as overload condition disappears, the ncp resumes operation. the 24 w ac?dc adaptor board specification the adaptor has following maximum and performance ratings. output power 24 w output voltage 12 vdc output current 2.0 a minimum input voltage 180 vac maximum input voltage 240 vac maximum switching frequency 70 khz the schematic diagram of the adaptor can be seen in figure 1. transformer design the bulk capacitor voltage than can be calculated: (eq. 1) v bulk? min v ac? min 2 180 2 255 vdc (eq. 2) v bulk? max v ac? max 2 240 2 339 vdc the requested output power is 24 w. assuming 87% efficiency the input power is equal to: (eq. 3) p in p out 24 0.87 27.6 w the average value of input current at minimum input voltage is: (eq. 4) i in?avg p in v bulk? min 27.6 255 108 ma application note http://onsemi.com
and8127/d http://onsemi.com 2 taking into account the absence of a clamping network the suitable reflected primary winding voltage for 800 v rated mosfet switch is: (eq. 5) v flbk 800 v v bulk? max v spike 800 339 330 131 v using calculated flyback voltage the maximum duty cycle can be calculated: (eq. 6) max v flbk v flbk v bulk? min 131 131 255 0.339 0.34 the following equation determines peak primary current: (eq. 7) i ppk 2 i in?avg max 2 108 10 ?3 0.34 635 ma the maximum switching frequency at minimum input voltage is 70 khz. taking into account quasi?resonant (qr) and valley switching operation of the ncp1207 the qr time interval from the instant of the total core demagnetization to the valley of switch's drain voltage needs to be taken into account when calculating the switch max. on?time interval. using qr time of 2 s appropriate for 70 khz switching frequency the on?time can be calculated as follows: (eq. 8) t on 1 f sw t qr max 1 70 10 3 2 10 ?6 0.34 4.177 s 4.18 s the ef25 core for transformer was selected. it has cross?section area a e = 52.5 mm 2 . the n67 ferrite material allows to use maximum operating flux density b max = 0.25 t. the number of turns for the primary winding is: (eq. 9) n p v bulk? min t on b max a e 255 4.18 10 ?6 0.25 52.5 10 ?6 80 turns the primary inductance can be calculated as follows: (eq. 10) l p v bulk? min i ppk t on 255 0.635 4.18 10 ?6 1.68 mh the a l factor of the transformer's core can be calculated as follows: (eq. 11) a l l p (n p ) 2 1.68 10 ?3 (80) 2 263 nh c2 47 f/ 400 v 470 q3 bc238 c5 1 nf r10 1 k pmec l1 2 1 34 + r2 100 r3 39 d3 1n4148 c11 100 nf c4 47 pf c1 + r13 18 k r4 1 k iso1 pc817 1n4148 c6 1nf q1 stp4nb80 q4 bc308 ic2 tl431bilp t2 12 4 3 r6 r7 100 r9 1 k r8 470 ic1 ncp1207 1 2 3 4 5 6 8 demag fb cs gnd out vcc vi + + 4k7 r12 r5 1.5 l2 15 uh + q2 bc238 q5 irf2807 c12 1 nf d2 1n4148 j2 1 2 j1 1 2 r11 33 k t1 6 5 2 1 10 3 4 9 7 c7 4.7 nf 1 nf / y1 f1 t1a r1 39 k ?+ db1 b250 3 1 4 2 figure 1. schematic diagram of the qr 24 w ac?dc converter with ncp1207 and synchronous rectifier c13 c8 470 f/ 25 v c9 470 f/ 25 v c10 100 f/ 35 v c3 10 f/25 v 100 nf/ d1 x2
and8127/d http://onsemi.com 3 since skin effect and eddy currents play a significant role in the flyback topology at given switching frequency the litz wire is used. it consists of 4 wires each with diameter 0.12 mm. to reduce the leakage inductance the primary winding is split to two windings each with half number of turns. the secondary w inding is inserted between those halves primary windings. this is well known as a sandwich arrangement. for an output voltage of 12 v, the number of turns of the secondary winding can be calculated (accounting for synchronous rectifier) as follows: (eq. 12) n s v s (1 max )n p max v bulk? min 12 (1 0.34) 80 0.34 255 7.3 8 turns the secondary winding is again made with litz wire. it consists in 24 wires featuring a diameter of 0.22 mm. using the above number of turns, the auxiliary winding derived: (eq. 13) n aux (v aux v fwd ) v s n s (12 1) 12 8 8.67 9 turns a single wire of 0.15 mm diameter was used for the auxiliary winding. the windings arrangement of the transformer is the following: 1. auxiliary 2. 1st half primary 3. secondary 4. 2nd half primary primary current control primary current control path consist in the sensing resistor r5, skipping resistor r4 and pin 3 of the ic named cs. the maximum voltage threshold on cs pin is about 1 v. the value of the current sense resistor r5 is therefore given by: (eq. 14) r 5 v th? max i ppk 1 0.635 1.57 1.5 the skipping resistor r4 value together with the internal 200 a current source gives the skipping voltage level. it is decided to set the skipping level to 20% of the maximum primary current. in this case the skipping voltage is 0.2 v. the value of the skipping resistor r4 is then: (eq. 15) r 4 v cs?skip i int 0.2 200 10 ?6 1 demagnetization detection and ovp the transformer demagnetization sensing is based on the zero crossing detection of the auxiliary winding's voltage. for this purpose the zero crossing detector built?in the ncp1207 is connected to pin 1. resistor r1 limits the current flowing through the pin 1 voltage clamps. also this resistor together with capacitor c4 delays the zero voltage crossing event. it helps to tune the turn?on instant when the drain voltage is in the valley. resistor r1 has also another function. together with the internal resistor divider, the comparator and its voltage reference, it forms an overvoltage protection circuit. pin 1 includes a 30 k resistor internally connected to ground. if the voltage on that pin reaches roughly 7.2 v an overvoltage latch is triggered and converter operation is blocked until input supply plug is disconnected. the value of resistor r1 then can be calculated as follows: (eq. 16) r 1 30 10 3 v cc? max 7.2 1 30 10 3 15.5 7.2 1 34.6 k 39 k the value of the delaying capacitor c4 is a result of tuning process on the real board. synchronous rectifier the synchronous rectifier consists in the following basic blocks: the sensor of the secondary current, the gate driver and the mosfet switch. a current transformer t2 senses the output rectifier current. the current transformer has its primary winding located in series with the secondary switch within the secondary current loop. resistor r6 loads the secondary winding of the current transformer. the resistor r6 converts the current into a voltage. that voltage is filtered and limited by capacitor c6 and diode d3. it then goes to the gate driver, which consists in transistors q2, q3 and q4 and pull?down resistor r8. for the current transformer the ring core r10 was selected. it features a cross?section area a e = 7.83 mm 2 . the n30 magnetic allows to use a maximum operating flux density of b max = 0.2 t. the appropriate number of turns than can easily be wound on that core is around 20. the maximum demagnetization time of the converter's transformer can be calculated as follows: (eq. 17) t dem n cs?se b max a e v clamp 20 0.2 7.82 10 ?6 0.7 45 s this value is bigger than maximum operating demagnetization time. it means that the current transformer has enough freedom to work properly even if the converter is overloaded or during the start?up sequence when the demagnetization time is longer due to a lower output voltage. feedback loop the feedback loop is based on the secondary side to ensure good output voltage regulation. the control circuit is based on a tl431 that has an internal reference voltage of 2.5 v. the output voltage of the converter is divided by the resistors r12 and r13. the resistor divider output voltage is compared with the internal reference voltage of the tl431.
and8127/d http://onsemi.com 4 with regard to tl431 input leakage current, the resistor divider's current of 500 a was selected. the resistor r12 then can be calculated as follows: (eq. 18) r 12 v tl431 i divider 2.5 500 10 ?6 5k 4.7 k the value of the upper resistor r13 of the divider is: (eq. 19) r 13 r 12 v out v tl431 1 4700 12 2.5 1 17860 18 k the resistor r10 ensures the minimum current supply of 1.0 ma for tl431 in case of the converter operation near to the maximum output power when current flowing through the led diode within the optocoupler iso1 is close to zero. the threshold voltage of the led being around 1.0 v, the value of r10 is: (eq. 20) r 10 v led i tl431 1 1 10 ?3 1k the resistor r9 limits the current flowing through the led in case the voltage across the output terminal of the tl431 is at its minimum, e.g. 2.5 v. considering the nominal output voltage 12 v and a maximum led current of 10 ma, the value of r9 is: (eq. 21) r9 v out v led v tl431 i led? max 12 1 2.5 10 10 ?3 850 1k resistor r11 together with capacitors c11.c12 creates a apole?zeroo compensation circuit of the feedback loop. their values are result of feedback loop response measurements and adjustments on the board. since ncp1207 allows a direct optocoupler connection, the iso1 is connected without any pull?up resistor to pin 2. capacitor c5 bypasses any high frequency current pick?up. primary switch snubber network since any standard snubber will generate losses, a different approach has been used in this design. to cope with voltage spikes, the primary switch has been rated for a 800 v bv dss . the snubber capacitor c7 is located on the secondary side. this capacitor has two functions. the first purpose is to create together with secondary leakage inductance the resonant tank. similarly the primary resonant circuit consists of the primary leakage inductance and associated parasitic capacitances. the resonant frequency of the secondary resonant circuit is approximately two times higher than resonant frequency of the primary resonant circuit. this frequency difference efficiently decreases the voltage spike on the primary. the second function of c7 is to protect the secondary switch from voltage spikes. bill of materials c1 100 nf / x2 c2 47 f / 400 v c3 10 f / 25 v c4 47 pf, ceramic c5 1.0 nf, ceramic c6, c12 1.0 nf, ceramic c7 4.7 nf, ceramic c8, c9 470 f / 25 v c10 100 f / 35 v c11 100 nf, ceramic c13 1.0 nf / y1 db1 b250 d1, d2, d3 1n4148 f1 1.0 a, time?lag ic1 ncp1207 ic2 tl431 iso1 pc817 l1 2*10 mh, common mode l2 10 h q1 stp4nb80 q2, q3 bc238 q4 bc308 q5 irf2807 r1 39 k r2, r7 100 r3 39 r4, r9, r10 1.0 k r5 1.5 r6, r8 470 r11 33 k r12 4k7 r13 18 k t1 transformer, see text t2 transformer, see below t2 transformer specifications ferrite core epcos (siemens) r10, material n30 primary winding 1 turn (see picture), heat resist- ing plastic insulated wire, copper 0.5 mm diameter. secondary winding 22 turns, enameled wire, copper 0.3 mm diameter. for winding beginnings see the application schematic.
and8127/d http://onsemi.com 5 pcb layout proper printed circuit board layout is essential for good operation of the whole converter. it also influences the emi signature in both conducted and radiated measurements. it is important to ensure good grounding technique and keep all high frequency current loop and high voltage areas as small as possible to avoid both magnetic and electric radiation. an example of the layout can be seen in figure 2. the component arrangement can be seen in figure 3. the board size is 97.5 * 44 mm. figure 2. printed circuit board layout ? bottom side figure 3. printed circuit board layout ? silkscreen component side
and8127/d http://onsemi.com 6 practical results one of the most important parameters considered during the converter design is the overall power conversion efficiency. for this reason the synchronized output rectifier was utilized. table 1 lists the measured results for converter working at minimum specified input voltage 255 vdc. the corresponding graphical representation of the t able 1 can be seen in figure 4. table 2 lists similar results for the maximum specified input voltage of 339 vdc. figure 5 again helps to see the results belonging to table 2. the no?load power consumption measured at 255 vdc input voltage is about 275 mw and at 339 vdc is about 385 mw. table 1. power conversion efficiency at 255 vdc input voltage p out (w) efficiency (%) 24 91.68 22 91.69 20 91.63 18 91.49 16 91.33 14 90.83 12 90.08 10 89.16 8 87.87 6 85.59 4 81.85 2 77.31 75 77 79 81 83 85 87 89 91 93 0 5 10 15 20 25 output power (w) efficiency (%) figure 4. power conversion efficiency at 255 vdc input voltage table 2. power conversion efficiency at 339 vdc input voltage p out (w) efficiency (%) 24 90.70 22 90.56 20 90.42 18 90.28 16 89.76 14 88.97 12 87.85 10 86.39 8 84.75 6 82.16 4 78.20 2 73.62 figure 5. power conversion efficiency at 339 vdc input voltage 70 73 76 79 82 85 88 91 94 0 5 10 15 20 25 output power (w) efficiency (%)
and8127/d http://onsemi.com 7 the following pictures of the basic voltage waveforms demonstrate the operation of the converter at specific conditions. figure 6. gate driver and drain voltage at full load figure 7. gate driver and drain voltage at medium load figure 8. gate driver and drain voltage at light load figure 6 shows in top trace the gate driver voltage and in bottom trace primary switch's drain voltage at full load. figure 7 shows the same measurement points as in figure 6 but at medium load condition when the first valley of the drain voltage is being skipped. figure 8 is the same as previous measurements but for light load condition when two valleys are skipped. the cycle skipping operation when the output load is very light is depicted in figure 9. figure 9. gate driver and drain voltage during the cycle skipping at very light load
and8127/d http://onsemi.com 8 the waveforms during overload condition is depicted in figure 10. figure 10. gate driver and drain voltage during the over?load detailed view of the burst pulse during overload can be seen in figure 11. this figure clearly demonstrates the operation of the internal soft?start block. figure 11. detailed view of the burst pulse the load regulation of the output voltage for load step change from 100% to 10% and vise versa can be seen in figure 12. figure 12. load regulation on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 and8127/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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